[abc80] abc80 på DE1 (fpga-kort) - henger?

[H. Peter Anvin]

On 08/10/2009 10:12 AM, Torfinn Ingolfsen wrote:
> 
> Warning: Implemented PLL "pll1:pll1|altpll:altpll_component|pll" as Cyclone
> II PLL type, but with warnings
>     Warning: PLL "pll1:pll1|altpll:altpll_component|pll" has the gated lock
> counter value set to 16 which is less than the recommended value of 5000
> (when inclk[0] has input frequency specified as 50.0 MHz)
>     Warning: PLL "pll2:pll2|altpll:altpll_component|pll" has the gated lock
> counter value set to 16 which is less than the recommended value of 2400
> (when inclk[0] has input frequency specified as 24.0 MHz)

Verkar totalt skumt!

Alla inställningar i Quartus ska redan finnas i abc80.qsf-filen...

	-hpa


-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.